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Troubleshoot Slip Secs Errors on Cisco Controller T1 Interfaces

We will find Slip Secs Errors on Controller T1 interfaces in Cisco Routers. If slips are present on the T1 line means there is a clocking problem from Telco provider. The Customer Premises Equipment (CPE) will need to synchronize to the clocking from the T1 provider (Telco). Cisco#show controllers t1 T1 0/0/0 is up. Applique type is Channelized T1 Cablelength is long 0db No alarms detected. alarm-trigger is not set Soaking time: 3, Clearance time: 10 AIS State:Clear LOS State:Clear LOF State:Clear Version info FPGA Rev: 08121917, FPGA Type: PRK4 Framing is ESF, Line Code is B8ZS, Clock Source is Line. CRC Threshold is 320. Reported from firmware is 320. Data in current interval (255 seconds elapsed): 0 Line Code Violations, 0 Path Code Violations 12 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins 0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, […]